A High-Performance Scheduling Algorithm Based on Packet Sto
Jing Qu, Ximing Hu, Peng Yi, Xingming Zhang, Binqiang Wang · 2005
The combined input-crosspoint-queued (CICQ) crossbar switch is becoming very attractive for the design of high performance routers due to the unique features it offers. A plethora of distributed scheduling algorithms with low complexities have been proposed for this architecture. However, the size of crosspoint buffer (CB) is limited in a single chip by today's ASIC technology. In this paper, we propose a novel scheduling scheme named the exceed threshold first round robin (ETFRR) which aims at reducing buffer size of CB. This scheme can reduce the packet loss ratio and improve packet storage ratio efficiently.