Fault dictionary compression and equivalence class computation for sequential circuits
P.G. Ryan, W.K. Fuchs, Irith Pomeranz · International Conference on Computer Aided Design · 1993
A new technique for creating small fault dictionaries for sequential circuits is presented, along with a hybrid combination of that new technique with another and performance improvements for a previously published technique. Seven techniques are compared and evaluated by their impact on dictionary size, fault simulation costs, and diagnostic resolution losses. The comparisons show that compact dictionaries with full resolution are computationally expensive, while small, inexpensive dictionaries almost always suffer a resolution loss. Measures of diagnostic resolution are described with an algorithm to approximate them in linear time. Experiments are presented for the ISCAS sequential benchmark circuits.