Dynamically Adaptable CMOS Winner-Take-All Neural Network
Kunihiko Iizuka, Masayuki Miyamoto, Hirofumi Matsui · Neural Information Processing Systems · 1996
The major problem that has prevented practical application of analog neuro-LSIs has been poor accuracy due to fluctuating analog device characteristics inherent in each device as a result of manufacturing. This paper proposes a dynamic control architecture that allows analog silicon neural networks to compensate for the fluctuating device characteristics and adapt to a change in input DC level. We have applied this architecture to compensate for input offset voltages of an analog CMOS WTA (Winner-Take-All) chip that we have fabricated. Experimental data show the effectiveness of the architecture.