Power‐aware hiding method for S‐box protection
Jiangsha Ma, Xiangyu Li, Moyang Wang · Electronics Letters · 2014
A power analysis attack countermeasure, called power‐awareness‐based hiding, is proposed. It is effective in implementing nonlinear operations, S‐boxes, in cryptographic algorithms. An advanced encryption standard (AES) S‐box circuit has been implemented in this approach using the Domino logic array style. The post‐layout simulation results show that the power‐aware hiding AES S‐box achieves a delay of 1.56 ns and a mean power consumption of 3.57 mW. The proposed method improves the power delay product by 65%, the normalised energy deviation by 43% and the normalised standard deviation by 30% compared to other secure methods.