A hardware implementation of nonlinear correlation filters
Saúl Martínez-Díaz, Hugo Castañeda-Girón · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2011
Recently, nonlinear correlation filters have been proposed for distortion-invariant pattern recognition. The design of the filters is based on rank-order, logical operations and nonlinear correlation. These kinds of filters are robust to non Gaussian noise and non-homogeneous illumination. A drawback of nonlinear filters is its high computational cost; however, the computation of nonlinear correlation can be parallelized. In this paper a hardware implementation of nonlinear filtering is presented. The hardware coprocessor is based on a Field Programmable Gate Array (FPGA) device. Simulation results are provided and discussed.