An automated probing procedure for board testing
William A. Johnson · 1976
Described is an algorithm used in PC board test programs to direct and control the probing sequence once the board has failed the functional test. Applicable to all static logic, the algorithm is used to test boards with TTL Series 54/74 dual-inline-packages (DIPS), probing with 16-pin and 24-pin IC probes (DIP-CLIPS) capable of simultaneous contact with all pins of a package.