Time-sequenced DMA for multimedia computers
Stuart Wray · ACM SIGARCH Computer Architecture News · 1991
Current computer architectures are well suited to the transfer of large amounts of data where latency is not important, and to transfering small amounts of data where latency is important. However, when latency is important and the quantity of data is large, today's computers do not perform so well. In this paper I describe a variety of scatter-gather DMA in which large amounts of data can be transfered with low latency through a computer system by using synchronised clocks in the transmitting and receiving devices.