GENERATING TEST PATTERNS FOR FPGA CIRCUITS: A QUANTUM COMPUTING APPROACH
Amardeep S. G. Singh · International Journal of Computational Methods · 2009
This paper presents an effective test pattern generation approach for FPGA circuits by applying quantum computing algorithms. A prototypical new algorithm named QFPGA is developed utilizing the properties of quantum theory, such as quantum superposition and quantum parallelism. The effectiveness of this technique in terms of result quality, CPU requirements, fault detection and number of iterations is experimentally compared with some of the existing classical approaches, like exhaustive search, simulated annealing and genetic algorithms. The algorithm developed is so efficient that it requires only √N (N is the total number of vectors) iterations to find the desired test vector, whereas in classical computing it takes N/2 iterations. Simulation results on various benchmark circuits are also covered in this paper. The extendability of the new approach enables users to easily find the test vector from FPGA circuits and can be adapted for testing FPGA chips.