Schematic description language for a hardware top‐down design approach
Kazuo Kobayashi, Haruo Wakabayashi, Yoshiaki Wakimura · Electronics and Communications in Japan (Part III Fundamental Electronic Science) · 1991
Abstract This paper presents a schematic language for describing the functional specification of hardware. The language provides a new computer input medium using a top‐down design essential to the systematic design of large‐scale hardware. This language has a special description model that uses a signal based on a new concept of connections between function blocks, called a virtual interface signal. This signal allows a designer to refer to it unrestrictedly among a hierarchy of function blocks. Therefore, the design can describe both an outline of the connections at an early design stage and the detailed connections at the final design stage based on the same description rules. Moreover, the designer can specify the hardware function by means of both a function block and a state transition diagram. Some preliminary experiments show that the language herein requires only about a quarter of the description man‐hours as that of a conventional character‐based description language. Also, using two types of design diagrams reduces the description man‐hours by about 40 percent over the function block diagram only.