The Implementation of the 65nm Dual-Core 64b Merom Processor

Nabeel Sakran, Marcelo Yuffe, Moty Mehalel, Jack Doweck, Ernest Knoll, Avi Kovacs · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2007

Merom is a dual-core 64b processor implementing the Coretrade architecture. The 143mm2die has 291M transistors in a 65nm 8M process. The shared 4MB 16-way L2 cache uses PMOS power gating to minimize leakage. The processor operates in a wide core frequency range of 1 to 3GHz, a bus frequency range of 666 to 1333MHz and voltage range of 0.85 to 1.325V, while providing 40% better power performance.

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