Column redundancy scheme for multipleI/O DRAM using mapping table
Yong-Weon Jeon, Young-Hyun Jun, Suki Kim · Electronics Letters · 2000
A new column redundancy scheme is presented that can minimise the die area overhead by repair circuits and also achieve fast access speed in high density dynamic random access memories (DRAMs) with wide data widths. The proposed scheme has a large redundancy-area-unit (RAU) which operates a flexible column redundancy scheme that consecutively shifts RDQ (redundant I/O) to neighbouring MDQ (main I/O) without any speed penalty. By using the proposed mapping fuse algorithm, the number of fuses required to store the fail bit address can be reduced, and the chip area reduced.