SPREX: A soft processor with Runahead execution
Kaveh Aasaraai, Andreas Moshovos · 2012
There is a growing demand for high-performance computation cores in embedded devices built over reconfigurable hardware. As a result, various soft core architecture techniques have been proposed, each targeting different application classes. This work presents SPREX, an FPGA-friendly Runahead soft processor architecture that targets applications with unstructured instruction level parallelism. The architecture of choice for such applications has traditionally relied on a mix of superscalar, out-of-order, and speculative execution. Unfortunately, the implementation of these techniques does not map well on reconfigurable hardware. This work shows that by exploiting the key characteristics of reconfigurable fabrics, and by tuning the architecture for the embedded environment, a fast and practical Runahead soft processor is viable. Runahead has been shown to offer many of the benefits of conventional architectures for the applications this work targets. We show that the proposed Runahead architecture improves performance of a simple 5-stage pipeline by 9% on the average and by as much as 36%.