A universal CNN neuron for CMOS technology: model and functional capabilities
Radu Dogaru, C. Chitu, Manfred Glesner · 2003
This article introduces a novel neuron model, tailored for VLSI implementation in CMOS technologies. This neuron is part of the "multi-nested" neuron family which is devices capable to learn and represent arbitrary n-inputs Boolean functions with O(n) complexity therefore leading to very compact implementations. A simple piecewise-linear model is derived for the proposed circuit, which is exploited for a fast and effective design and the investigation of the functional capabilities. Robustness issues are also considered. Comparison with a more detailed SPICE simulation of the circuit, presented in a companion paper, demonstrate the effectiveness of the PWL model.