Application specific compiler/architecture codesign
Oliver Wahlen, Tilman Glökler, Achim Nohl, Andreas Hoffmann, Rainer Leupers, H. Meyr · 2002
This paper proposes an architecture exploration methodology for application specific instruction set processors (ASIPs) including a C compiler and a VHDL model in the exploration loop. For a given application the target architecture is an instance of the scalable ALICE VLIW architecture which will be presented in this paper. In a case study it will be explained how the LISA processor design platform in conjunction with the CoSy compiler environment significantly reduces the time for exploration cycles. Using a typical telecommunications application, the quality of the resulting architecture and its performance are compared to the ICORE2 processor - a manually designed ASIP for efficient processing of computation intensive kernels.