FPGA Implementation of Artificial Neurons: Comparison study
Saad Al-Kazzaz, Rafid Ahmed Khalil · 2008
This paper proposes three different architectures for implementing an artificial neuron model, with three types of processing techniques: serial, partial parallel, and full parallel. The sigmoid function is implemented using three approximation approaches. These architectures are implemented on Xilinx Spartan-IIIE FPGA chip using a 16 bit fixed-point arithmetic representation. A comparison is then made between the three alternative architectures with different neuron computation methods for performance and area. Results obtained show an improvement when a pure hardware implementation is used over a pure software implementation (MicroBlaze soft core processor). However, using a hardware implementation results in a much higher performance with somewhat lower flexibility, while the hardware/software co-design implementation shows a moderate performance, flexibility, and usage area.