A 300-MHz 115-W 32-b bipolar ECL microprocessor
Norman Paul Jouppi, P.D. Boyle, Jeremy Dion, Mary Jo Doherty, Alan Eustace, Ramsey W. Haddad, Robert N. Mayo, S. Menon, Louis M. Monier, Don Stark, S. Turrini, Jichul Yang, R. Hamburgen, J.S. Fitch, Russell Kao · IEEE Journal of Solid-State Circuits · 1993
A full-custom single-chip bipolar ECL RISC microprocessor was implemented in a 1.0- mu m single-poly bipolar technology. This research prototype contains a CPU and on-chip 2-KB instruction and 2-KB data caches. Worst-case power dissipation with a nominal -5.2 V supply is 115 W. The chip has been designed for a worst-case clock frequency of 275 MHz at a nominal supply. The chip verifies a new style of CAD tools developed during the design process, advanced packaging techniques for high-power microprocessors, and VLSI ECL circuit techniques.>