NePSim: a network processor simulator with a power evaluation framework
Yan Luo, Jun Yang, Laxmi Narayan Bhuyan, Li Zhao · IEEE Micro · 2004
This article presents NePSim, an integrated system that includes a cycle-accurate architecture simulator, an automatic formal verification engine, and a parameterizable power estimator for NPs consisting of clusters of multithreaded execution cores, memory controllers, I/O ports, packet buffers, and high-speed buses. To perform concrete simulation and provide reliable performance and power analysis, we defined our system to comply with Intel's IXP1200 processor specification because academia has widely adopted it as a representative model for NP research.