Pentium Pro processor design for test and debug

A. Carbine, D.B.I. Feltham · IEEE Design & Test of Computers · 1998

The need to quickly ramp a complex, high-performance microprocessor into high-volume manufacturing with low defect rates led this design team to a custom, low-area DFT approach and a manually written test methodology that targeted several fault models. Their approach effectively balanced testability needs with other design constraints, while enabling excellent time to market and test quality.

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