Yagi‐type hardware neuron model with CMOS IC
Yoshifumi Sekine, Kiyoko Torita, Jun Matsuoka · Electronics and Communications in Japan (Part II Electronics) · 2002
Abstract With a view to engineering applications of the information processing mechanisms used by neural networks in biological bodies, various studies have been conducted on pulse‐type neurons and neural networks. When research on a large‐scale pulse‐type neural network is carried out, there are limitations on computer simulation, so that hardware realization is desirable. When a neural network is realized by hardware, it is advantageous to model a single neuron by a CMOS IC suitable for large‐scale LSI. In this paper, in reference to the Yagi neuron model, a pulse‐type hardware neuron model, it is shown that a new pulse‐type hardware neuron model can be constructed with a simple circuit configuration that can be realized with CMOS ICs. First, the equivalent inductor constructed with a low capacitance and an enhancement‐mode MOSFET is discussed. Its configuration and characteristics are elucidated. Next, the negative resistance circuit is discussed. A circuit is proposed that can be applied to the CMOS process. From their characteristics, it is shown that two new neuron models based on the Yagi neuron model can be constructed. They are the conventional pulse‐type neuron model fired by an external input and the pacemaker neuron model that can fire itself. © 2002 Scripta Technica, Electron Comm Jpn Pt 2, 85(3): 23–29, 2002