Architecture of a real-time Fast Fourier radar signal processor
Arthur S. Zukin, S. Wong · 1970
This paper describes the architecture of an all-digital signal processor for a high pulse repetition frequency (high PRF) radar. The processor replaces a bank of hundreds of (approximately) 100 Hz bandwidth analog filters with an equivalent but more capable and smaller, lighter and less expensive digital system. The digital system acts in real-time by converting input signals (time domain) from analog to digital form, collecting sets of such converted signals and then performing a discrete Fourier transform upon them. Thus, it produces a (frequency domain) result which is equivalent to the output from the bank of analog filters or from a spectrum analyzer.Because the processor is employed on a full-time basis solely to perform the Fourier transform, it can be designed to do this task at lower cost than a general purpose computer and with lower performance logic circuits and memory than would be required in a general purpose computer. It can perform direct and inverse Fourier transforms and could be used in pattern matching and convolution. The processor described can be modified and/or adapted to low or medium PRF and/or synthetic array modes as well as to communications systems. For example, this basic design has been successfully used in communications systems to perform both the direct and inverse transform and serves as both demodulator and modulator.The selected processor architecture separates the functions to be performed from each other and in most cases assigns physically distinguishable portions of the equipment to the functions because:1. If the functions are not conceptually separated, the overall task is unduly complex. Like a conventional digital computer, the processor is a collection of simple blocks; though complex considered in the ensemble, they are easily understood separately.2. Separating functions and associating them one-for-one with equipment demonstrates the equivalence between the generalized fast Fourier (Cooley-Tukey) procedure and the equipment.3. By designing for the application from the outset one can pick efficient hardware for implementing the functions. The result is a straightforward design with a comparatively small number of efficient functional blocks.