Integration of a Highly Scalable, Multi-FPGA-Based Hardware Accelerator in Common Cluster Infrastructures
Oliver Knodel, Andy Georgi, Patrick Lehmann, Wolfgang E. Nagel, Rainer G. Spallek · 2013
Heterogeneous systems consisting of general-purpose processors and different types of hardware accelerators are becoming more and more common in HPC systems. Especially Field Programmable Gate Arrays (FPGAs) provide an energy-efficient way to achieve high performance. Numerous application areas, including bio- and neuroinformatics, require enormous processing capability and employ simple computation cores, elementary data structures and algorithms highly suitable for FPGAs. To allow an efficient work with distributed FPGAs, it is necessary to provide a simple and scalable integration of these FPGAs in a common cluster architecture and to permit an easy access to these resources. Our approach enables a system-wide dynamic partitioning, a batch-based administration and the monitoring of FPGA resources. The system can easily be reconfigured to user-specific requirements and provides a high degree of flexibility and performance.