A real-time multi-face detection system implemented on FPGA
Nai-Jian Wang, Sheng-Chieh Chang, Pei-Jung Chou · 2012
In the field of face recognition and establishment of face database, face detection is a crucial step. Most of the face detection proposed as now are focused on software algorithms to improve the detection rate and decrease the false alarm. However, the more complex algorithm, the more computation time is required. It hinders our real-time applications. In this paper, we proposed a real-time multi-face detection system based on hardware design to enhance the processing time. The proposed hardware architecture is implemented on Altera DE2-70 development board to test the feasibility of our hardware design. The implementation of our system requires 15,223 logic elements. It can operate in real-time at a frame rate of 30fps, and detect up to five faces simultaneously. The experimental result shows that our proposed face detection architecture attains a real-time reliable system with low cost and high detection rate.