A high performance processor for applications based on fuzzy logic
Giuseppe Ascia, Vincenzo Catania · 1999
The paper presents the architecture of a digital processor dedicated to execution of fuzzy inference. The paper presents the design of a VLSI architecture dedicated to execution of fuzzy inference. The execution speed is up to 16 MFLIPS for inferences with 128 rules with 4 linguistic variables, 11 MFLIPS with 8 linguistic variables. This level of performance is obtained by means of a method that reduces the number of rules to be processed. Moreover, rule processing is split into a sequence of pipeline stages which make it possible to process the active rules at each clock cycle and a certain degree of parallelism is introduced into these stages.