Automatic debugging of System-on-a-Chip designs
Frank Rogin, Rolf Drechsler, S. Rülke · 2009
Designing system-on-a-chip (SoC) using system-level languages is becoming a standard in industry. However, the non-deterministic semantics of such parallel languages could yield failures that are hard to debug. In this paper, we present a new approach that supports automatic debugging of SoC designs written in SystemC using a method that isolates failure-inducing process schedules.