Memory Efficient Implementation of Two Graph Based Circuit Simulator for PDE-Electrical Analogy
Yogesh Dilip Save, H. Narayanan, Sachin Patkar · 2013
The paper describes a method to improve the performance of the Two Graph based circuit simulator in order to solve very large size circuits arising out of an electrical analogy for Partial Differential Equations (PDEs). The method is based on a memory efficient implementation of the linear solver with the Two graph method on Graphics processors (GPU). We have built simulators based on the Two Graph method with different linear system solvers, direct (Cholesky) and iterative (Conjugate Gradient (CG)) solvers, for solution of PDEs through the electrical analogy and compared the performance with simulators based on MNA and different LU solvers. The use of Cholesky and CG solvers would not be feasible with MNA. The comparison reveals that the iterative solver based simulator is suitable for large size circuits due to its reduced memory requirement. The memory requirement of the simulator is further lowered by an implicit implementation of the iterative solver with the Two Graph method (without storing the system matrix representing electrical equations). But this increases the computational time. The timing performance of the simulator is improved by an efficient implementation of the implicit CG method on GPU. Using this method, we have been able to simulate circuits arising from Poisson equations with approximately 5 million nodes and 20 million edges in less than 12 minutes using 3.2 GB memory.