Shared output buffer‐type switching architecture with fair output port contention
Hideki Tode, Miki Yamamoto, Hiromi Okada · Electronics and Communications in Japan (Part I Communications) · 1995
Abstract This paper considers the shared output buffertype switching system as an architecture suited to the large‐scale ATM switching system. an architecture is proposed, which can solve the fair throughput assignment problem among the ports belonging to the same shared memory, which is a problem in sharing the output buffer. the proposed architecture realizes fair access to the destination port contained in the specified shared buffer, by sort processing and the address attachment, without using the random access contention unit to the buffer in the knockout switch. For the proposed architecture and the conventional shared output buffer‐type knockout switching system, the performances are compared by deriving the cell loss probability due to the output contention for each port. As a result, it is verified that the proposed architecture is better in terms of the realized cell loss probability. The performance of the switching system is evaluated by a computer stimulation when various buffering schemes are applied to the shared output buffer. Then it is shown that the fair throughput assignment among the considered output ports can be realized by combining the proposed architecture with an adequate buffering scheme.