Efficient VLSI algorithm and an implementation architecture for gray-scale morphology
Sung-Jea Ko, M. Shridhar · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1990
This paper presents an efficient VLSI architecture for the real-time implementation of grayscale morphological operations. The proposed architecture employs a bit-serial approach which allows grayscale morphological operations to be decomposed into bit-level binary operations by a bit-modification algorithm, and thus requires only p binary operation units for the p-bit grayscale signal. In this realization, grayscale opening and closing are accomplished by local rather than cascade operations, providing greatly increased data throughput. It is shown that this realization is simple and modular in structure and is suitable for VLSI implementation.