A microprocessor farm architecture for high speed data acquisition and analysis
D. Cutts, Jan S. Hoftun, Christopher R. Johnson, Raymond T. Zeller · IEEE Transactions on Nuclear Science · 1989
The authors discuss the requirements and architecture of the DO Level-2 data acquisition system as well as its current status. They then consider its implementation using a new generation of hardware which is currently under development. The major enhancement to the acquisition system will be the adaptation and use of new Q22MPM multiport memories. Block diagrams of the acquisition system and of the multiported memory are presented.>