Unique Multilevel Flash Memory Devices Operating at High Programming Speed, Designed Utilizing Novel Asymmetric Gates
Man Gu Kwon, Jae Ho Kim, Tae Whan Kim, Kae Dal Kwack · Japanese Journal of Applied Physics · 2005
Unique multilevel cell (MLC) flash memory devices utilizing novel asymmetric gates were proposed to enhance a writing time. Different coupling ratios and maximum storage charges of the MLC flash memories with the asymmetric floating gates decreased the number of step pulses for the storage of the multi-bits in each memory cell. These results indicate that the writing time of the MLC flash memories can be improved by using the asymmetric floating gate structure consisting of the different coupling ratio and the maximum storage charge in the floating gates.