Unified systolic array for fast computation of the discrete cosine transform, discrete sine transform, and discrete Hartley transform
Sung Bum Pan · Optical Engineering · 1997
Sogang UniversityDepartment of Electronic EngineeringC.P.O. Box 1142Seoul 100-611, KoreaE-mail: [email protected]. A two-dimensional (2-D) very large scale integration (VLSI)architecture using a unified systolic array for fast computation of thediscrete cosine transform (DCT), the discrete sine transform (DST), andthe discrete Hartley transform (DHT) is proposed. The N-point discretetransform is decomposed into even- and odd-numbered frequencysamples and they are computed independently at the same time. Theproposed unified systolic array architecture can compute the DCT, theDST, and the DHT by defining different coefficient values specific foreach transform. We also present another architecture for computation ofthe DHT, a modified version of the unified systolic array structure, whichis faster than the unified architecture by a factor of 2. In addition, theproposed unified architecture can be employed for computation of theinverse DCT (IDCT), the inverse DST (IDST), and the inverse DHT(IDHT) with some modifications.