Recursion and hierarchy in digital design and prototyping
Dmitri Mihhailov, Margus Kruus, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson · 2011
With the constant growth of integration level, today's circuits contain way over millions of gates. This puts forward a fundamental question -- how to efficiently use enormous and continuously rising hardware resources in the design process? This paper describes a reuse technique that can be applied to the design of FPGA-based application-specific digital systems. Reusability is achieved at the level of specifications. The proposed specification and implementation method is based on the model of hierarchical finite state machine (HFSM). This allows to describe fragments (modules) in such a way that the developed algorithm can be composed of either new or previously designed modules providing reuse on project scale.