Frequency distribution modeling for high-speed microprocessors using on-chip ring oscillators
John M. Carulli, Derek C. Wrobbel, Aswin Mehta, Kenneth E. Krause, Brad E. Campbell, F. Valente · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1999
It is critical for success in the microprocessor business to understand the relationship between yield and speed- performance. This paper outlines a method for modeling device speed distribution and yield using on-chip ring-oscillator measurements. The modeling method is used in production on the UltraSPARCTM-II family of microprocessors. Lot-level speed distributions are predicted within 10% by speed-bin and quarterly distributions within 5% by speed-bin. Graphs are generated to show the relationship between business and process concerns.