Real-time testing method for 16 Gbps 4-PAM signal interface
Masahiro Ishida, Kiyotaka Ichiyama, Daisuke Watanabe, Masayuki Kawabata, Toshiyuki Okayasu · 2012
This paper proposes a method for testing a device with multi-level signal interfaces. This method utilizes multi-level drivers that generate multi-level signals and multi-level comparators that are based on a new concept. The multi-level drivers can test the voltage noise tolerance of a receiver device with multi-level signal interfaces. The multi-level comparators realize real-time functional testing of a multi-level signal with the same number of comparators as a conventional test system, by changing the threshold voltage levels dynamically in response to the expected values of a signal under test. This dynamic threshold comparator concept is suitable for a system testing a high-speed multi-level signal. This method is also scalable for an increase in the number of voltage levels such as 8-PAM and 16-PAM signals. In addition, with the proposed method, the testing of a signal having emphasis/ de-emphasis can be realized, and improved testing of the digital modulation signal such as by QAM can be expected. Experimental results are discussed with a prototype circuit that demonstrates the proposed concept applied to a 16 Gbps 4-PAM Test System. Applications of the proposed method are also discussed.