New Systolic Algorithm and Array Architecture for Prime-Length Discrete Sine Transform
Pramod Kumar Meher, M.N.S. Swamy · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2007
Using a simple input-regeneration approach and index-transformation techniques, a new formulation is presented in this paper for computing an N-point prime-length discrete sine transform (DST) through two pairs of [(N-1)/4]-point cyclic convolutions, where [(N-1)/4] is an odd number. The cyclic convolution-based algorithm is used further to obtain a simple regular and locally connected linear systolic array for concurrent pipelined implementation of the DST. It is shown that the proposed systolic structure involves significantly less area-time complexity compared with that of the existing structures