Generating pipeline integrated circuits using C2HDL converter
Denis V. Dubrov, A.S. Roshal · 2013
We present an overview of an experimental converter which automatically generates electronic circuit VHDL descriptions implementing the pipeline loop body computations written in C language. The converter processes tightly nested pipelined loops with assignment operators and regular data dependencies. An integer arithmetics is supported. The converter is able to use predefined implementations for particular operators. It also provides test benches for the generated units.