Intrinsic fluctuations in Vertical NAND flash memories
Etienne Nowak, Jaeho Kim, HyeYoung Kwon, Young-Gu Kim, Jae Sung Sim, Seunghyun Lim, Dae Sin Kim, Keun‐Ho Lee, Young-Kwan Park, Jeong-Hyuk Choi, Chilhee Chung · 2012
Vertical NAND (VNAND) technology relies on polysilicon for channel material. Two intrinsic variation sources of the cell threshold voltage induced by polysilicon traps have been identified and simulated: Random Trap Fluctuation (RTF) and Random Telegraph Noise (RTN). We demonstrate that RTN is enhanced by the polysilicon material and an original model explains the asymmetric RTN distribution observed after endurance. This work enables the prediction of VTdistribution for VNAND devices in MLC operation.