Parallel lines [co-processor chips]
James Hrica, C. Sullivan, Jeff Jussel · Information Professional · 2006
This paper deals with a design of hardware co-processor chips that can give computer architectures an extra boost to overcome CPU bottlenecks. Grid computing and other approaches are being tried in a bid to throw multiple processors at a growing range of standard IT challenges. PC vendors like Dell are shipping multi-processor with dual-core boxes. Chip maker AMD provide hardware co-processors based on FPGA which is a type of programmable logic device. FPGA cosists of three principal components such as registers, function generators (also known as look up tables or LUTS) and the FPGA clock. Each function generator contains of a set of logic gates. An FPGA can be configured as multiple virtual processors capable of functioning in parallel. In order to incorporate parallelism of hardware in a software application using FPGAs, the developer must partition the design between those tasks that will remain on the CPU and those that will run in hardware. To accelerate the system, the developer moves portions of the implementation to hardware connected to the CPU, such as an FPGA situated on a PCI, HyperTransport or PCI Express interface board.