A 4b/cell NROM 1Gb Data-Storage Memory
Y. Polansky, A. Lavan, Ran Sahar, O. Dadashev, Yoram Betser, Guy Cohen, Eduardo Maayan, Boaz Eitan, Ful-Long Ni, Yen-Hui Joseph Ku, Chih-Yuan Lu, T.-C. Chen, Chun-Yu Liao, Chin-Hung Chang, Chung-Kuang Chen, Wen-Chiao Ho, Yite Shih, Wenchi Ting, Wen-Pin Lu · 2006
A 4b/cell 1Gb data flash based on a low-cost NROM process technology is achieved. The design includes a two-phase programming algorithm for supporting a fast and accurate threshold-voltage control. The read scheme incorporates a simple error-detection mechanism combined with an accurate drain-side sensing circuit with a built-in offset cancellation