Wear-leveling for PCM main memory on embedded system via page management and process scheduling
Pan Chen, Mimi Xie, Jingtong Hu, Meikang Qiu, Qingfeng Zhuge · 2014
Phase Change Memory (PCM) has been considered as a leading candidate to replace the traditional DRAM in embedded systems due to its promising characteristics such as low leakage power, low cost, non-volatility, and high scalability. One of the constraints that undermine the credential of PCM as main memory is its limited write endurance. In this paper, we develop wear-leveling techniques purely on the Operating System (OS) level to extend lifetime of PCM. Without extra hardware support, OS management is more flexible to be integrated into existing embedded systems. To achieve wear-leveling, the Periodical Page Swapping (PPS), Rearrangement Inequality Based Page Allocation (RIPA), and Write Intensity Based Process Scheduling (WIPS) algorithms are proposed in this paper on OS level. The experimental results show that the proposed techniques can significantly extend the lifetime of PCM main memory.