Cell Multiprocessor Communication Network: Built for Speed
Michael Kistler, Michael Perrone, Fabrizio Petrini · IEEE Micro · 2006
Multicore designs promise various power-performance and area-performance benefits. But inadequate design of the on-chip communication network can deprive applications of these benefits. To illuminate this important point in multicore processor design, the authors analyze the cell processor's communication network, using a series of benchmarks involving various DMA traffic patterns and synchronization protocols