AN OPTIMAL SYSTOLIC DICTIONARY
Ip-Wang Chan, F. Choi · Parallel Processing Letters · 1995
We present a simple systolic algorithm for implementing dictionary machine based on the VLSI technology. Our design makes use of a dynamic. global tree rebalancing scheme to attain high system throughput. Our scheme is simple to implement and requires low sophistication in the design of processing nodes. Results from analysis and simulation show that our algorithm has optimal response time and achieves an average latency close to 1. This represents a significant improvement over many of the previous designs. Unlike most parallel dictionary machines reported in the literature, our approach requires no compression operations.