Representation of floating point with reconfigurable logic.
Armando Jiménez Flores, Isaac Schnadower Baram, Guillermo Castillo Tapia, Maximino Peña Guerrero · The Journal of the Acoustical Society of America · 2010
Given the discreet nature of the digital systems and that the languages used in their design do not provide native instructions to handle floating point numbers, it is advisable to develop hardware solutions that allow the representation of this type of numbers in order to improve the precision and speed in applications related to signal analysis. In this document we show an algorithm that describes the floating point numbers, by means of Very High Speed Integrated Circuits Hardware Description Language (VHDL), to create the fundamental bases for the development of a floating point arithmetical unit that can be implanted in Field Programmable Gate Array (FPGA) devices and be applied in voice signal processing. Our algorithm uses the simple precision format of IEEE-754 standard, and the operation used as a test is an arithmetical sum. The results are by means of generated waveform with design tools of the Xilinx Company.