High-efficient hardware design based on enhanced Tschirnhaus transform for solving the LSPs
Chung-Hsien Chang, Shi-Huang Chen, Bo‐Wei Chen, Chih‐Hsiang Peng, Jhing-Fa Wang · 2013
This work presents a novel hardware design based on the enhanced Tschirnhaus transform (ETT) to solve the 8-order line spectral pairs (LSPs). To reduce high-complexity problems caused by fractional multiplication, the ETT is proposed to replace such operations with integer-based shift and addition operations of the original Tschirnhaus transform. Also, the data dependency graph (DDG) of the ETT is analyzed for designing hardware units and reducing computation cycles. The proposed hardware has two key blocks: the mixture computation unit (MCU) and the multiplier-free pipelined square-root unit (PSRU). The first block is designed to fast calculate multiplication and summation operations in the ETT with the use of a two-stage pipeline architecture. The second is developed to speed up square-root operations after 8-order LSPs are decomposed into two 4-order LSPs. It can also timely process the result of the first block within limited cycles. The experimental results show that compared with the Chebyshev-based research, the proposed hardware can reduce the cycle times by 98.1% and also saved about 49.7% of gate counts. In the precision evaluation, the result indicates that 95% of the computation errors are within 0.02 and proves that the proposed hardware is capable of quantizing LSPs almost as accurately as computers do. Such results reveal that the proposed work is superior to the other Chebyshev-based methods, thereby demonstrating the effectiveness of the proposed design.