A 32 bit programmable signal processor for a multiprocessor system environment
J. Hesson, F. Gallagher, D. Harrington · IEEE Transactions on Acoustics Speech and Signal Processing · 1983
The architecture, system design, and program operation are presented for a 32 bit programmable signal processor that can operate in a single or multiprocessor system environment. The processor design features include moderately high throughput, versatile input-output structure via a vector interrupt assisted programmed I/O or distributed DMA, relative ease of programming, and a low absolute parts count.