ORION 2.0: A Power-Area Simulator for Interconnection Networks
Andrew B. Kahng, Bin Li, Li-Shiuan Peh, Kambiz Samadi · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2011
As industry moves towards multicore chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constraint, early-stage estimation of NoC power has become crucially important. In this work, we present ORION 2.0, an enhanced NoC power and area simulator, which offers significant accuracy improvement relative to its predecessor, ORION 1.0.