ILP and heuristic techniques for system-level design on network processor architectures
Chris Ostler, Karam S. Chatha, V. Ramamurthi, Krishnan Srinivasan · ACM Transactions on Design Automation of Electronic Systems · 2007
Network processors incorporate several architectural features, including symmetric multiprocessing (SMP), block multithreading, and multiple memory elements, to support the high-performance requirements of current day applications. This article presents automated system-level design techniques for application development on such architectures. We propose integer linear programming formulations and heuristic techniques for process allocation and data mapping on SMP and block-multithreading-based network processors. The techniques incorporate process transformations and multithreading-aware data mapping to maximize the throughput of the application. The article presents experimental results that evaluate the techniques by implementing network processing applications on the Intel IXP 2400 architecture.