Experiences with a Private Enterprise Cloud: Providing Fault Tolerance and High Availability for Interactive EDA Applications
Vinaya Kamath, Ravi Giri, Rajeev Muralidhar · 2013
Silicon Design and Electronic Design Automation (EDA) business is highly competitive and time to market is of utmost importance in the semiconductor industry where companies put in a lot of effort to make sure that the first silicon is as healthy as possible. Hence it is imperative that the EDA compute environment provides maximum uptime to design engineers by utilizing several different High Performance Computing (HPC) technologies. In this paper we present Intel's EDA compute infrastructure, along with a detailed software and system architecture for supporting workload checkpointing, restoration and migration for specifically EDA jobs that are interactive in nature. We also describe our experiences in providing high availability for such EDA applications using existing popular HA/FT techniques. We believe that this is one of the few detailed descriptions of the EDA compute infrastructure of a large and complex semiconductor design company and that this will be useful in addressing future HPC challenges for EDA workloads as HPC technologies mature and evolve.