Logic BIST for Structured ASIC
Radu Gavrus, Carmen Gerigan · 2006
The paper presents the design and test methodology for logic BIST implementation based on mucontroller and dedicated logic array-base technology such eASIC. The build in self test (BIST) is a methodology used to decrease manufactory test cost and is the most used form of testing multimillion gates designs or SoC. New testing methodologies are used to reduce the volume of the testing data related with ATE (automatic test equipment). Logic BIST is one of the BIST technique used today for SoC designs to test logic interconnection between logic elements