Analysis of floating point roundoff errors using dummy multiplier coefficient sensitivities
Bing Zeng, Yrjo A. Neuvo · IEEE Transactions on Circuits and Systems · 1991
A simple method for analyzing roundoff errors in floating-point digital filters is presented. The method is based on the coefficient sensitivities of dummy multipliers with gains of one and connects the roundoff error analysis to coefficient sensitivity analysis. A general formulation for calculating the roundoff noise level at the output of a digital filter is presented, and a simple upper bound for roundoff error accumulation is derived. The approach makes it possible to draw some general conclusions about the floating-point roundoff noise properties of certain filter structures. The cascade, parallel, and Gray-Markel lattice structures are analyzed in detail. The interaction between coefficient sensitivity and roundoff error is discussed, and several general conclusions are drawn. Numerical examples confirm that the method is accurate enough for practical use.>