Numerical method for DC fault analysis simplification and simulation time reduction
Juraj Brenkuŝ, Viera Stopjaková, Gábor Gyepes · 2013
This paper presents a numerical approach to DC fault analysis of analog circuits that improves the total computational time and reduces the total complexity of such analysis. The reduction is achieved by utilization of calculus that can substitute conventional simulations and thus, significantly reducing computational time. A detailed description of the approach including its mathematical background is presented. Accuracy and time efficiency are demonstrated on a test circuit.